1. Technical Field
The present invention relates to semiconductor devices in general, and in particular to metal oxide semiconductor (MOS) transistors. Still more particularly, the present invention relates to a MOS transistor having a slew-rate control.
2. Description of the Prior Art
Integrated circuit devices commonly employ output buffers for driving other external devices. In order to provide a high DC drive capability, at least two output transistors are typically placed in parallel within each output buffer of an integrated circuit device. When an output buffer is changing states, the switching current present within the output buffer becomes a major source of noise spikes on power buses, which may induce latch-up to other devices. Although such noise spikes can be lessened by reducing the size of output buffers, small output buffers are usually incapable of driving heavy loads that are frequently required of an output buffer. Hence, a slew rate control circuit is commonly provided to slow down an output buffer in a manner that will reduce the rate of change of output voltage and peak current value while maintaining the DC drive capability of the output buffer. Slew rate is defined as the rate of output transition in volts per unit time. Slew rate control is also very important in the settings of precision differential amplifier applications and delay line applications in which precision delay signals are introduced to a signal propagation.
Conventionally, a slew rate control circuit for an output buffer includes multiple delay elements placed between each pair of parallel output transistors within the output buffer. However, the inclusion of delay elements requires considerable amount of silicon area in which the output buffer is implemented. The area penalty becomes more costly as the output area becomes a size limiting factor for circuits that are manufactured in submicron technology. Consequently, it would be desirable to provide an improved apparatus for controlling the slew rate of an output buffer such that the above-described problems associated with the prior art slew rate control circuit can be alleviated.
In accordance with a preferred embodiment of the present invention, a transistor having a slew-rate control includes an elongated diffusion area and an elongated gate overlying the diffusion area. The elongated diffusion area has at least two diffusion regions, each having a threshold voltage that is different from each other. The elongated gate has a gate contact at only one side of the elongated diffusion area.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.